FPGA Project Integration for Arm® Processor Systems

Design of a new SoC FPGA Project or integration of an existing FPGA Project to SoC FPGA Project

• Hard Processor System (HPS/PS) and FPGA I/O Configuration
• I/O Mapping via the FPGA Interconnect to share I/O between FPGA and the Arm® Processor System
• System Memory (SDRAM) Conception, Design (DDR3,DDR4) and Configuration
• Shared System Memory (SDRAM) conception and implementation to use Memory pool with Arm® Processor System and FPGA Soft-IP
• TCL script-based Package I/O assignment
• Arm® AMBA® AXI Bridge Interface Design between the Arm® Processor System and FPGA
• Configuration of Hard-IP (e.g. CAN) for FPGA and Arm® usage

Used SoC FPGA Design Tools

• SystemVerilog, VHDL
• Intel® Quartus® Prime Standard Edition and Pro Edition
• MentorGraphics® (Siemens® EDA) ModelSim™
• Intel® External Memory Interface Toolkit (for the Intel® Arria® 10 SX)
• TCL- and Python-Scripts (for system verification, build automation,...)
• MathWorks® MATLAB™ (for Simulation input file generation)